Generic Hardware Architectures for Sampling and Resampling in Particle Filters

Generic Hardware Architectures for Sampling and Resampling in Particle Filters

Authors: Akshay Athalye, Miodrag Bolić, Sangjin Hong, Petar M. Djurić

Field: Electrical and Computer Engineering

Abstract: Particle filtering (PF) is a statistical signal processing methodology utilized for solving problems in signal processing and communications, often outperforming traditional filters in practical scenarios. However, the computational complexity and the absence of dedicated hardware for real-time processing have hindered their application. This paper introduces generic hardware architectures for implementing the Sampling Importance Resampling Filter (SIRF), a commonly used PF. These proposed architectures provide a generalized framework for hardware realization of SIRF applicable to any model. Significant reductions in memory requirements are achieved compared to straightforward implementations. Two distinct architectures are presented, each based on a different resampling mechanism. Furthermore, modifications to these architectures are proposed to accelerate the resampling process. The evaluations focus on resource usage and latency using the Xilinx Virtex II pro FPGA platform. The presented architectures have facilitated the development of the first hardware (FPGA) prototype for the particle filter applied to the bearings-only tracking problem.

Keywords: particle filters, hardware architectures, memory schemes, real-time processing, bearings-only tracking.